00:00:30 Today, I want to talk about a very important industrial technology of the last half of

00:00:55 the 20th century, the technology for making integrated circuits. These are the backbone

00:01:02 of modern electronics. They're what have brought you low-cost computers and a variety

00:01:08 of electronic controls spreading to almost all parts of industrial activity and in everything

00:01:16 around the home. This technology has been very powerful. It has allowed us to reduce

00:01:24 the cost of electronics dramatically over the last few decades. In fact, today you

00:01:30 can buy an integrated circuit containing millions of transistors for the price of a single transistor

00:01:36 when I first got in the business in the late 50s. I know of no other technology that has

00:01:41 made million-fold reductions in cost. This is one of the things that has made it so powerful.

00:01:48 In fact, to use an analogy, one I've used quite often, if the auto industry had progressed

00:01:55 at the rate of the semiconductor industry as a result of this technology over the last

00:02:01 35 years, today you could buy a car that would travel comfortably at several million miles

00:02:07 an hour, get a million miles per gallon of gasoline, and would be more economical to

00:02:14 throw away your Rolls-Royce and buy a new one and to park it downtown for the evening.

00:02:19 I thought that was pretty good until once somebody in the audience pointed out to me

00:02:22 it would only be about an inch tall and two inches long. It wouldn't be much good for

00:02:26 your morning commute. Recently, this analogy was updated by Professor Jeffrey Rayport of

00:02:33 Harvard and applied to the aircraft industry instead. By his calculations, a Boeing 767

00:02:42 would cost about $500 and would circle the earth in 20 minutes using five gallons of

00:02:50 fuel. Clearly, there's something unique about this semiconductor technology. To me, what

00:02:57 we're doing is exploiting a violation of Murphy's Law. By making things smaller, everything

00:03:05 gets better simultaneously. The circuits become higher performance because the transistors,

00:03:12 as they become smaller, will operate at higher frequencies. The power consumption drops considerably.

00:03:21 Systems become much more reliable, but most importantly, the cost of doing things electronically

00:03:27 drops dramatically. Let me show you a couple of the early devices that were really the

00:03:35 beginning of this technology. First, what I consider to be the beginning, the planar

00:03:41 transistor. This picture shows a top view of a single transistor structure that covered

00:03:50 a silicon wafer in those days about three-quarters of an inch in diameter. There were tens of

00:03:59 these identical transistor structures on the silicon wafer. Beyond this stage, they got

00:04:08 cut up into individual transistor structures, wires attached to the two aluminum electrodes

00:04:14 that you can see here, the one in the center and the circle of light-colored material with

00:04:21 the little blob on the corner of it. The third contact of the transistor being the bottom

00:04:27 of the piece of silicon where it was soldered onto the package material. I have a fond recollection

00:04:35 of this particular device. It's probably the only product I ever designed personally that

00:04:39 went into production. The peculiar dimension, 764 microns, reflects merely the fact we used

00:04:48 to work in the English system and this was 30 thousandths of an inch. This is the conversion

00:04:53 from English to metric that gives the unusual number. The next slide shows the first planar

00:05:01 integrated circuit made at Fairchild Semiconductor in 1961. I'm sorry that the picture that's

00:05:11 been preserved with such a bad example, clearly this one is quite dirty and the pads around

00:05:18 the edge to which the connections were to be made are fairly badly damaged in the process

00:05:25 of etching the round piece of silicon so it would fit in the package, the kind we used

00:05:31 at the time. These were the first two examples, the basic technology that I'm going to be

00:05:39 describing. The planar transistor gave us a structure where we could interconnect devices

00:05:47 by running metal films up over the sensitive parts of the transistors called junctions

00:05:54 and could connect one to the other. The idea of the integrated circuit was developed initially

00:06:02 I guess at Texas Instruments where Jack Kilby built an integrated circuit and then at Fairchild

00:06:08 where Bob Noyce had the availability of these planar transistors. He saw how to extend that

00:06:14 technology to make a practical integrated circuit and that has been the basic technology

00:06:19 that has been evolving ever since. In the early 1960s, I was asked to write an article for the

00:06:28 35th anniversary of Electronics Magazine in which I was supposed to predict the course of

00:06:34 semiconductor components over the next 10 years. In that, I took the existing integrated circuits,

00:06:43 there were only relatively few at that time, looked at how the complexity had been increasing

00:06:48 and thought that was a trend that was going to continue and I drew the curve that is shown in

00:06:55 the slide. This extrapolated from the most complex circuit with something like 60 transistors and

00:07:04 resistors in it to something that would be a thousand times as complex by 1975. This thousand

00:07:13 fold extrapolation corresponding to a doubling of the number of components in an integrated

00:07:19 circuit every year was what got termed Moore's Law at some later date. Moore's Law has been

00:07:26 applied to a lot of other things and I'm happy to take credit for all of them, but this was

00:07:31 really the origin of that idea. Well, the next slide shows a sprinkling of some of the more

00:07:42 complex devices that were built during that decade and as you can see, they track the line

00:07:46 really quite closely, certainly much better than I could ever have expected them to do when I

00:07:52 originally published the curve. The most complex device was within a factor of two of the thousand

00:08:01 fold increase in complexity that I had predicted. Clearly, the technology was extending quite

00:08:07 rapidly and had a long way to go. Now, it is useful to look at this and to say what changed

00:08:17 in the technology that allowed this huge increase in complexity and of course, with the increase

00:08:22 in complexity, the decrease in the cost per electronic function since we could sell an

00:08:30 integrated circuit for not much more than the price of the individual transistor. This curve

00:08:36 can be resolved into a few different contributions. As you see on the next slide, during this time

00:08:43 period, the size piece of silicon, the die size as we call it today, that is the size of the little

00:08:51 square into which we cut the round wafers, grew somewhat in area. It also grew exponentially but

00:08:59 was nowhere near the thousand fold growth that we saw for the complexity of the device. So,

00:09:07 another something else had to be happening. We had to be increasing the density of electronic

00:09:12 circuitry on the silicon wafer. That is, we had to be able to pack more transistors and resistors in

00:09:20 the same amount of real estate and indeed, that's what was happening. Again, as a result of more

00:09:27 than one factor. The next slide shows what happened just because of the process density. As

00:09:36 I mentioned earlier, this technology makes finer and finer features to get all of the benefits

00:09:42 that we've described. This shows the result of making finer features in increasing the density

00:09:50 of the components on the wafer. It goes obviously is the square of the linear dimension. Since the

00:09:57 line width and spacings weren't always the same, we've used the average rather than the individual

00:10:04 numbers on the ordinate. The abscissa showing time and again, if you neglect the first point,

00:10:12 which was the first planar transistor, it falls quite well on an exponential curve and that first

00:10:18 point can legitimately be neglected because on the first planar transistor we had a lot of other

00:10:24 problems to worry about. Working at the minimum dimension was not one of the things we considered

00:10:30 important. Now, we have two things now. We have the increasing size of the die and we have the

00:10:38 decreasing size of the features on the die. We can compare those two contributions to the total

00:10:46 of what happened during this time period. As you see on this curve where I've plotted first of all

00:10:52 each of the two contributions separately, that is that due to the increasing die size and that due

00:10:59 to the reduction in dimensions. You can take those two curves and add them or since this is logarithmic

00:11:06 logarithmic scale, you're really multiplying those two effects. We get this intermediate line,

00:11:11 the product of die size and dimensions. You see while it accounts for something like two-thirds

00:11:19 of the increase in the complexity of the circuits, there's still a significant chunk left which I've

00:11:26 ascribed here to device and circuit cleverness. That is people learn to design circuits that packed

00:11:34 more closely on the piece of silicon. It was room that was left for invention. Now, I had done this

00:11:46 in 1975 and looking forward one thing was of concern. While we could still see increasing

00:11:55 the density by making smaller dimensions and increasing the die size, the room for this

00:12:01 cleverness had really disappeared because the last point plotted for 1975 was a particular kind

00:12:09 of a device that packed transistors as closely together as they would fit geometrically on the

00:12:14 wafer. There was no more room for cleverness. So, at that time we predicted that the slope would

00:12:21 change and we would no longer be doubling every year but it's something somewhat longer than that

00:12:27 corresponding only to the other two factors that we had available. Still though, this is a very

00:12:33 rapid rate of progress in a technology and allows the complexity of the circuits to double every

00:12:41 year and a half rather than every year, slowing down the rate of progress somewhat but still

00:12:47 maintaining something that is unprecedented with any other industrial technology that I can find.

00:12:53 What's happened since? The next slide shows the die size history up until the present time for

00:13:07 both microprocessors and for the large volume dynamic random access memories that are prevalent

00:13:15 in most computing systems today. This continues on the same slope as the line from the early 60s

00:13:24 through 1975, suggesting that nothing has really changed in our ability to make larger and larger

00:13:31 silicon die economically. This trend has continued. Similarly, on the next slide we see what has

00:13:40 happened on the increase in density due to line widths. Here again, the slope has continued the

00:13:49 same as it was previously with the average line width decreasing about a factor of two every six

00:13:57 years. The same trend that we've been on since 1960. So, the increase in circuit density should

00:14:09 proceed as it did previously with only the factor for cleverness removed. The next slide shows what

00:14:19 I calculated for a 1975 update of Moore's law. Unfortunately, it's not what I published because

00:14:26 I thought things were going to carry on a little further with a contribution from cleverness. There

00:14:34 was a good technical reason why it didn't happen. The devices I was looking at turned out not to be

00:14:39 practical, having some fairly fundamental problems. But the calculation shows that the line is very

00:14:46 close to what was actually achieved over this period. Tracking with the most complex devices,

00:14:53 the DRAMs, tracking very closely the calculated curves. Now, the question looking forward is can

00:15:05 this be expected to continue? What has to be done for it to continue? And let's look at a little bit

00:15:12 of those things. First of all, for it to continue in this line, we have to obviously be able to

00:15:20 continue to make larger and larger dice and to continue to reduce our feature sizes. But we get

00:15:27 to the point where there's several other considerations that we also have to consider as we

00:15:33 look at the evolution of the technology. For example, in looking at microprocessor technology,

00:15:41 here's a list of a few things that has to be taken into account as well as just the sheer

00:15:48 complexity. Performance is one of the major drivers for pursuing new processors and performance

00:15:58 requires that several things be considered. For example, the transistors themselves have to be

00:16:05 made faster and faster, which happens fairly naturally as we go to smaller dimensions. But

00:16:10 increasingly, we have to worry about the interconnection structures, how their performance

00:16:16 affects the performance of the total circuit. And of course, how close we can get things together, the

00:16:21 density of things on the circuit itself. Reliability is extremely important. We have to be sure we

00:16:28 don't get to a region where our lines are so narrow or layers so thin that we have problems with the

00:16:36 basic integrity of the structure. And we have to worry about high volume manufacture. This has

00:16:45 become a very important industry. Products are made in millions, 10s of millions, and even

00:16:50 hundreds of millions for certain kinds of devices every year. And the economical and repeatable

00:16:57 manufacture is something that is always a major concern, and one that is increasingly a

00:17:02 consideration. Let's look at a few of these in somewhat more detail. First, let's take the

00:17:10 minimum feature size, the thing that's necessary to keep us on this curve, continuing to violate

00:17:16 Murphy's Law. This shows Intel's minimum feature size over an extended period of time, mostly on

00:17:26 processor rather than on memory devices. And it shows the roadmap that was laid out by the

00:17:34 Semiconductor Industry Association, suggesting how this is going to continue to go over the next

00:17:39 several years. As you can see, the slope we've been on tends to continue. In fact, it's

00:17:48 extrapolated at least into the early part of the next century. This corresponds to the halving of

00:17:57 the minimum dimension every six years. And since technology generations, that generally takes two

00:18:06 technology generations to make such a halving of the minimum dimension, the steps we show here as

00:18:13 points correspond to something that is about the square root of that. So every one of these steps

00:18:22 between every technology generation, say, for example, from the one shown above about 1989 to

00:18:29 the one shown above 1992, cuts the area a given function requires in half. Since if you square that

00:18:42 square root of two, you get the factor of two that corresponds to the shrinking die size. I'll show

00:18:49 that a little more clearly later on. Now, there are a lot of concerns one has to have about the

00:18:57 ability to continue this. Some technological and some that relate to the basic physics of the

00:19:04 devices. For example, do transistors continue to behave as transistors as the minimum dimensions

00:19:12 get of the order of 10s of microns. The production devices today are around 0.35 microns minimum

00:19:23 dimensions. This predicts a continuous improvement down to the range of perhaps 0.18 and maybe another

00:19:32 generation to 0.13 microns. Laboratory devices have been made that show the electrical characteristics

00:19:41 still are useful for making circuits in this dimensional range. It becomes more questionable as

00:19:50 one gets down to around 0.03 or 0.05 microns. There it appears that some of the physics may actually make

00:19:59 the devices so they cannot be produced as part of a major circuit. But that gives us a long time to worry

00:20:07 about that. And frankly, I'm more worried about the technological problem than I am about the basic

00:20:12 physical limit in this case, because making these narrow features is increasingly difficult. At one time, it was

00:20:22 generally accepted in the industry that it would probably not be possible to make these structures by optical

00:20:30 lithography, the standard production technique, below about one micron. We were using light of wavelength around a

00:20:38 half micron, and getting the high resolution required over a large field size, we thought might require using

00:20:48 dimensions twice the wavelength of light. In fact, we have been able to pass that one micron barrier without ever

00:20:58 seeing a change in the slope of the curve. This was done partially by using shorter wavelengths. We've moved to

00:21:05 ultraviolet, we'll move to increasingly hard ultraviolet as we move down the curve. But at least as big a contributor

00:21:14 has been the progress has been made in optics. The systems that do this today use the state of the art in optics.

00:21:22 These are huge lenses or very sophisticated mirror systems that allow us to make structures over very usable areas

00:21:33 where the structural features are of the order of a wavelength and in some cases by taking special precautions less than the

00:21:40 wavelength of light. We have to continue to push in that direction to stay in this curve because frankly, once we can no longer

00:21:49 use optical lithography, we're faced with some choices that are not very attractive. In fact, we have about three equally

00:21:58 unattractive choices, the use of x-rays, the use of direct electron beam writing or the writing with ion beams, all of which

00:22:07 will increase the cost dramatically and will negate much of the learning that we have accomplished over this period of time

00:22:17 using optical lithography. Staying on this minimum feature size curve is one of the real challenges for the industry. To show you

00:22:27 what some of these little devices look like, the next page shows a cross section through a production transistor today. This is a

00:22:37 transistor made with a 0.35 micron technology and is used in making Intel's most advanced Pentium and Pentium Pro

00:22:45 microprocessors. The silicon substrate is the pedestal upon which the various features are sitting. Actually, the only part of the

00:22:59 silicon wafer that seems really active in these structures is the top micron or so, the rest of it just acts as a mechanical support for

00:23:10 the structure. The two heavy pillars that you see, one on either side of a central structure, are plugs of tungsten that are used to

00:23:24 make contacts to the source and drain of this MOS transistor. The gate electrode being the little structure on top of the center

00:23:35 feature. The caps on top of the tungsten pillars are aluminum interconnection lines that run in or out of the picture in order to hook this

00:23:49 transistor to the rest of the circuit. The entire gray area surrounding the tungsten plugs and the silicon substrate is silicon oxide, which in

00:24:01 this scanning electron micrograph shows up as rather featureless. If we move to the next generation of technology or in fact, two generations

00:24:13 down to the kind of things that are just being made experimentally today, you see the transistor on this slide is showing 0.18 micron minimum

00:24:24 feature size and the related structure. This is really pushing our capability now. In fact, this is a laboratory capability and it will be several years

00:24:36 before this can be done reproducibly in production. I mentioned that more than just density was important in looking at technology appropriate for

00:24:48 processors in the future. The next slide shows, for example, how performance is affected by the transistors and by the interconnections. As you see, the

00:25:03 performance of the transistor continues to improve. That is the delay time related to the transistor gets shorter and shorter as we go to smaller and smaller

00:25:13 minimum dimensions. On the other hand, the delay time and the delay time I'm talking about here for the interconnection is that for a two millimeter line

00:25:24 connecting devices on the integrated circuit increases. Now up until the current generation, which is the 0.35 generation of technology, the delay from the

00:25:38 interconnects is still significantly less than that from the transistors. While it has to be taken into account, it's not yet the limiting factor. As we move to the next

00:25:50 generation of technology, however, at a quarter micron, the delay from the interconnection starts to dominate the delay from the transistor and looking at a little

00:25:59 further in time, far dominates it. So it's something that requires a tremendous amount of attention and continue to evolve the technology so we can take maximum

00:26:09 advantage of it. The reason the interconnect contributes this delay is that as we make smaller and smaller features to take advantage of them, we have to make narrower and

00:26:23 narrower interconnection lines. As we do that, the resistance goes up. Even if we keep the thickness of the film the same, as the line become narrower, its resistance

00:26:33 increases. And as they get closer together, the capacitance from the line to its neighbors also grows. So the RC time constant, the resistance times the

00:26:44 capacitance of these lines is what limits their performance. Obviously, there's an opportunity here to look for materials that lower the resistance or lower the

00:26:59 capacitance. It's hard to find them. Typical interconnections are made of aluminum. There are better conductors than aluminum, for example, copper and silver, but they

00:27:09 present tremendous technological problems and neither has been satisfactorily incorporated into reliable integrated circuits. Similarly, with respect to the

00:27:18 capacitance, there are materials with lower dielectric constant than the silicon dioxide, but not much lower. And they require abandoning a lot of the technology

00:27:30 that has developed here over the decades. Not an easy change to make for a small incremental improvement. There is one thing, however, we can do, though. We can work hard to keep

00:27:40 things close together. And one way to do that is to increase the number of layers of metal. So instead of running distances in one layer, we can run up into an upper story

00:27:52 along and down again. The next slide shows a modern structure. In fact, this structure is actually the one we use in our 0.35 micron technology. The silicon shows just barely at the

00:28:09 bottom of the picture. The section on the right shows four layers of conductor, labeled M1 through M4, with the intervening plugs, typically of tungsten, that connect one layer to the

00:28:25 other. This technology for the multilayer interconnection has moved very rapidly over the last several years, primarily as the result of a technology called planarization, where we're able to restore a flat surface between each series of steps. So we're always working on a surface where we don't have to be too concerned about things like depth of field or about films running up and down.

00:28:55 Some topology that might be relatively difficult. This will continue to be an approach that will help alleviate the problems of performance relating to interconnections. It will allow us to increase the density. But what it does is complicate the process considerably. Each of these layers of metal has an underlayer that makes the metal interface to the insulator.

00:29:25 work well. It has the basic aluminum layer or aluminum copper alloy, typically, and then special metals to make contact to the tungsten in one thing or another. So the number of process steps grows dramatically as we add layers. But the benefit of being able to maintain the very high density and to continue to increase it certainly justifies movement in this direction.

00:29:56 Another problem we have to contend with is one of the minimum layer thicknesses that we use in the technology. In particular, concern about the minimum insulator layer. This is also an important parameter in determining transistor performance. And it's one where we actually are approaching some sort of a physical limit.

00:30:19 I've taken this data from something published by Professor Mead at Caltech. And he shows a point that is sub-tenth micron and about 30 angstroms of being in production. I don't know where that's produced. That's certainly far beyond anything we're doing in both respects.

00:30:39 On the other hand, this trend is one that the industry has been on for some time. While it looks like the trend toward always narrower lines as the minimum feature size, it has a real physical limit that relates to quantum mechanical tunneling.

00:30:59 At 50 angstroms, at a few volts, electrons will tunnel through a material. So even a good insulator like silicon oxide will actually show up as conducting.

00:31:11 The rate of tunneling increases exponentially as the thickness decreases. So at 30 angstroms, tunneling is a very important problem and is something that has to be contended with at even very low voltages.

00:31:29 Now in fact, we've utilized this to make some special kinds of devices where we actually tunnel through the insulator in order to charge or discharge electrodes.

00:31:40 On the other hand, for conventional transistors, it's a problem and the kind of thing that requires us to take precaution. Probably the precaution will be that the layers will tend not to get any thinner than this.

00:31:54 Of course, you have to recognize that a 30 angstrom layer is only a few atomic layers thick, you know, maybe

00:32:04 five to 10 layers of silicon oxide. So we're really getting down pretty close to the atomic nature of matter. Clearly a fundamental limit there. On the other hand, we can continue to exploit the other

00:32:19 improvements on the technology, such as decreasing feature size, even though we're getting down in a range where we can no longer decrease the thickness of the insulator.

00:32:33 As we increase complexity, other things happen. There's a lot going on in a microprocessor with 10 million transistors.

00:32:43 This requires a fair amount of power, and indeed the power consumption has grown as the complexity of the devices has grown.

00:32:53 Partially just because of the increase in the number of transistors that have to be active, but more importantly, because this gets combined with an increase in frequency.

00:33:05 And the power consumption in these devices is typically that of charging capacitors and then discharging them to ground. So you get kind of a CV squared impact on the

00:33:20 total power consumption. That is, if the capacitance goes up, the total amount of stuff on the chip goes up, the power increases, and as the voltage squared, so

00:33:31 the voltage at which the circuits operate is clearly an extremely important parameter.

00:33:39 This curve shows that processors today are dissipating of the order of 20 watts, and indeed that's what Intel's leading edge

00:33:49 processors do. The extrapolation is what the Semiconductor Industry Association roadmap suggests we should be able to do looking forward.

00:34:04 Now,

00:34:05 it takes a lot of work to achieve even this, and the last point out here is nearly 60 watts, an awful lot of power to get out of a package containing one of these

00:34:19 processors, and a real problem for things like laptop computers, where batteries can't support 60 watt processors for very long.

00:34:29 In order to stay on this curve, it's necessary that we scale the voltage of operation.

00:34:36 This was almost a constant for many years.

00:34:40 Five volts was the standard operating voltage for the families of integrated circuits that were used conventionally, and from the 60s clear into the 90s,

00:34:55 five volt operation was where almost all products were designed.

00:35:01 As we got into these power problems, however, the attractiveness of scaling voltage became

00:35:08 higher and higher, and also by scaling voltage we could take advantage of the decrease in feature size,

00:35:17 since the ability to support voltages decreases as we go to smaller and smaller structures.

00:35:25 We've taken the step now from five volts to 3.3 volts, and expect to see it step down fairly rapidly to some kind of an ultimate limit.

00:35:33 While there's no fundamental limit we can point to clearly, the engineering consensus seems to be that somewhere around one volt is where this will stop being productive.

00:35:46 Indeed, getting from where we are to reliable high-performance one volt circuit requires a lot of really good engineering.

00:35:55 There's a lot still to get out of the technology, but we have to look at a lot of directions simultaneously.

00:36:02 Here I've talked about a few of the technical ones, now I want to

00:36:08 change over and talk a bit about some of the economic ones. In particular, let me talk about cost.

00:36:16 There are a variety of things that contribute to the cost of a microprocessor or other complex

00:36:22 integrated circuit. There's certainly the design cost, the product cost, and then the ongoing support cost.

00:36:28 I'm going to say a little bit about each of these. Certainly the cost to design these products

00:36:35 has not gone up as fast as the complexity, but it has gone up at a significant rate.

00:36:41 Where we've increased the complexity orders of magnitude, we've only increased the design cost

00:36:48 by a fraction of that because of the improvement in the computer age that we use.

00:36:55 On the other hand, the design of a modern microprocessor can be several hundreds of millions

00:37:00 of dollars now. If only a small quantity is made, that design cost amortized across the whole

00:37:09 production life of the device can be a significant contributor to the total cost.

00:37:14 For example, if you spent 200 million dollars to design a microprocessor and only made 200,000

00:37:21 of them over the lifetime, which is a large number for a processor dedicated to a single application

00:37:28 or a single company, the cost of the design alone adds a thousand dollars each to the

00:37:35 microprocessors that have been built. A huge increment when you look at personal computers

00:37:42 selling for less than that. Similarly, the design and engineering for the production process

00:37:53 is in the multiple hundreds of millions of dollars range this time for each of these

00:37:57 generations of technology. Not counting the cost of replicating that technology to build it in

00:38:04 volume, just the cost of the engineering necessary to bring it to fruition.

00:38:09 Product cost, we have to look at a variety of contributors. The cost of the piece of silicon

00:38:15 itself, the die, or the silicon chip, the cost of the package and packaging, the cost of testing,

00:38:22 and then these things always require some ongoing support. Let's look at a couple of these things

00:38:30 Let's look at a couple of these things in more detail.

00:38:35 This shows the relative cost for developing generations of microprocessors at Intel.

00:38:42 You see that the Pentium Pro is well over a hundred times the cost of developing the 8080

00:38:50 in the early 70s, and that the cost per generation is something like doubling. I

00:38:57 suppose here's another corollary to Moore's law that I ought to expound upon, but I don't plan to

00:39:04 at this time. This is only one of the factors of the one-time cost we have to consider, but I want

00:39:13 to spend more time talking about the cost of practicing the technology itself. That is,

00:39:19 the economics of building these batch produced devices. By batch produced, I mean

00:39:27 the case where we take a silicon wafer and we cover the entire silicon wafer with identical

00:39:32 structures, so that in the process of building one of these structures, we build tens or hundreds of

00:39:39 them, so that the cost of processing the wafer can be amortized over all the good chips we get

00:39:46 out of that wafer. Then these get cut up and packaged individually, and I want to take you

00:39:52 through a very simple model of how this works, so you get an idea of the kinds of things we have to

00:39:58 be concerned with in practicing this technology in manufacturing. On the next slide, I show the

00:40:08 simple function of how many squares can you get out of one of these circular wafers. That is,

00:40:15 depending on the size of the square, and I'm measuring the size of the square here

00:40:20 as the edge of a square die. That is, a 0.5 die is a half inch by a half inch,

00:40:29 and if you pack those on an 8-inch circular wafer, you can get 220 or whatever that point is there

00:40:37 on the wafer geometrically. It's not just a case of the ratio of the areas and squares don't pack

00:40:43 perfectly in a circle. You have to wiggle them around to see how it fits best, but this is a

00:40:49 straight geometric relationship of how many square die of a certain edge can you get on an 8-inch

00:40:55 wafer. The thing you see right away is that you get well over four times as many half-inch die

00:41:03 as you get one-inch die, which has to do with the efficiency of packing squares in a circle.

00:41:09 Clearly, if what you're interested in doing is making a cheap piece of silicon,

00:41:14 you want as small a die as possible because you want to get as many as you can,

00:41:19 but this far understates reality because, in fact, not all the dice are good. If you look

00:41:27 at the silicon wafer as containing some kind of a random distribution of defects,

00:41:33 and should one of those squares include one of those defects, it's no good. We have to reject it.

00:41:39 You can see that a bigger piece of silicon, a bigger die, has a higher probability of picking

00:41:46 up a defect for a given defect density than a small one does. So, not only do we get more of

00:41:52 them to start out with by making them small, we get a higher percentage of them that are good,

00:41:57 and I have done some calculations along that way on the next slide showing the yield,

00:42:08 that is the percentage of their good, for various die sizes, for various defect densities.

00:42:14 The defect densities here are stated in average defects per square centimeter. Excuse my mixed

00:42:20 dimensions. We use inches for die, centimeters for defects. It just happens to be the conventional

00:42:29 units that we've grown up to use at Intel, and if I translate them, I lose some of the relations

00:42:37 I'm used to being familiar with. Anyhow, this reflects a range of defects from probably

00:42:46 something better than the best production processes today to something comparable with the worst,

00:42:52 because any company that's beyond the one defect per square centimeter now probably is no longer

00:42:58 in business. As you can see, these curves diverge quite rapidly as you go to the right.

00:43:06 So, the defect density is an extremely important parameter here, as is the die size in determining

00:43:15 what we get. In fact, the next slide shows how many good die you get, where we combined the yield

00:43:24 from the previous slide with the number of possible from two slides previous, and see the total number

00:43:35 of good die one gets for various defect densities and various die sizes. Here we see that that 7

00:43:43 tenths inch die that I was describing indeed does give us about three die per wafer should we

00:43:52 have the high density, the one defect per square centimeter in our process, but we might get as

00:44:00 many as 70 or so die from the same wafer if we were operating at a tenth of a defect per square

00:44:08 centimeter. The factor of 20 difference in how many good units we'd get off a wafer, depending

00:44:14 only on the quality of our processing is measured by defects per square centimeter. So, there's a

00:44:21 tremendous premium on low defects in the processing and in squeezing to the smallest possible die.

00:44:32 Another way to look at this is cost. If I take those numbers of die off a wafer and reflect a

00:44:40 cost of a process wafer of something like $3,000, which is certainly in the ballpark, although I'm

00:44:45 sure every company in the semiconductor business would quibble with it one way or the other,

00:44:51 you see that it's very easy to get a die just from the process wafer that costs over $100.

00:45:01 Taking our 7 tenths inch die again, in fact, you have to operate a very clean process,

00:45:08 low defect density, in order to keep the die cost below $100. On the other hand, if I could get

00:45:14 the same function on a piece of silicon that was only a half inch on a side, I get down to $100

00:45:20 cost, even with the poorest manufacturing, and something in the range of $20 with the very best

00:45:26 manufacturing. So, there is tremendous leverage in that direction. And that's the reason you see the

00:45:33 kind of evolution you do in product lines. For example, on the next slide I've shown

00:45:39 photographs of three different generations of Intel's Pentium processor.

00:45:47 The original one made on 8 tenths micron minimum feature size technology.

00:45:53 The one that was a workhorse in 1994, most of 1995, the 0.6 micron technology.

00:46:01 And the current one we're shipping mostly today, the 0.35 micron technology.

00:46:09 The die size is about half the area in each of these. That is, the edge is the square root of two

00:46:16 down in each case. So, the 1995 die is only a quarter as large as the 1992 die.

00:46:25 From that alone, we get four times as many off a wafer. When you take into account the improved

00:46:31 manufacturing in the meantime, we clearly get a lot more than that. So, the cost of one of these

00:46:37 on the right is a lot less than the cost on the left. On the other hand, if you look here, you see

00:46:43 that the maximum frequency is doubled. The 66 megahertz maximum we get off the 8 tenths micron

00:46:50 technology. We now ship 133 megahertz devices. Twice the performance from that alone. The power

00:46:59 has dropped a factor of three. This is that violation of Murphy's law coming in, where we've

00:47:04 made the same device on three generations of technology and have realized the advantages of

00:47:09 going to the smaller structure on the new technology. It clearly benefits in a single generation.

00:47:18 And when looked at over several generations, the benefits are even more startling.

00:47:24 On the next slide, I've showed Intel's entire family of 32-bit microprocessors from the original

00:47:33 8386 to today's Pentium Pro. In fact, I've even shown some here that don't exist yet,

00:47:39 particularly the last generation of Pentium Pro showing on quarter micron technology,

00:47:46 since Intel has no quarter micron technology in production yet. This shows the trend though.

00:47:53 If you look at the first generation of each of the product families, you see that the area is

00:47:58 actually increasing. The Pentium Pro in the first generation is bigger than the Pentium was in its

00:48:04 first generation, even though it's on one generation later technology. Notice the size of the Pentium

00:48:14 and the Pentium Pro, for example, both on the 3 tenths micron technology. The Pentium is

00:48:21 significantly less than half the size of the Pentium Pro. So what we've done is we've taken

00:48:27 advantage of this higher density technology in two different ways here. One place, we've taken

00:48:32 advantage of it to make the same device, lower cost, higher performance. And the other way,

00:48:40 we've taken the advantage of the new technology to make a much more complex device, actually even

00:48:45 somewhat larger than the previous one, but with the expectations of shrinking it onto at least

00:48:51 two subsequent generations of technology. This is the power of this ability to continue to make

00:48:58 smaller and smaller structures, and it's why the industry is driving so hard in that direction.

00:49:06 Now to do this has become increasingly difficult, and as it's become increasingly difficult,

00:49:14 the equipment has gotten far more sophisticated and far more expensive.

00:49:20 We've evolved from a very people-intensive industry to one that is very capital intensive.

00:49:28 I can show this a bit by looking at the cost of the equipment to build 5,000 wafers a week

00:49:36 at various times, various generations of technology, where the minimum feature size

00:49:42 is shown along the curve and the wafer size is shown along the top. I chose 5,000 wafers per week

00:49:49 because that's about the size manufacturing facility that takes full use of the equipment,

00:49:55 where you can balance the output from one type of machine with the next type of machine by

00:50:01 having two of these and seven of those or whatever it takes. So equipment typically doesn't have to

00:50:06 sit idle very long. When Intel started in 1968, we not only equipped our first manufacturing

00:50:14 facility, we developed our first products and processes all for three million dollars.

00:50:19 Today that doesn't buy a single production tool. In order to build a reasonably efficient factory

00:50:29 at the three-tenths or 0.35 micron generation, you see we're well over a billion dollars for

00:50:36 the equipment alone. You add that to a building that probably costs three to five hundred million

00:50:41 dollars and you see you're in a factory that is the order of a billion and a half in order to

00:50:48 have a reasonable efficient manufacturing facility and that's continued to grow. In fact,

00:50:53 the growth to quarter micron is rather significant and before long we have to consider another

00:51:02 increment in wafer size. There's an industry trend toward 12-inch wafers instead of 8-inch wafers.

00:51:10 If you look at previous changes in wafer size, for example, the change from the one and a half

00:51:16 micron technology to the one micron technology, you see the capital cost more than doubles.

00:51:21 Similarly from the 0.8 micron to the 0.5, which goes from six to eight inch wafers, it doubles or

00:51:27 so. I guess from this I ought to speculate that a 12-inch wafer facility in the next generation of

00:51:34 technology, the equipment alone will be in the two and a half billion dollar range.

00:51:40 This is really a capital intensive industry. That's far more than a modern automobile assembly

00:51:46 factory, for example. The reason is the cost of the equipment. Well, twofold. The cost of the

00:51:52 equipment and the fact we're increasing the number of process steps in order to do all these nice

00:51:57 things like add more metal layers to maintain the density. For example, the lithography equipment,

00:52:03 the basic machine for printing patterns on the silicon wafer has escalated in cost from

00:52:09 $12,000 per machine when Intel got started to something like $10 million per machine for the

00:52:16 0.18 micron technology. That's not a firm number yet. There's some speculation it might be closer

00:52:26 to 15. The quarter micron technology, however, with about $7 million cost is something that

00:52:33 we're already spending to put the capacity in place. So from $12,000 to $7 million, a 500-fold

00:52:42 increase in the cost of a machine to process about the same number of wafers an hour. The wafers are

00:52:48 bigger. The quality of the process is a lot better, but basically you put about the same number

00:52:54 through in a given time. Well, what can a fab turn out? The world market for personal computers

00:53:05 is predicted to hit $100 million sometime later this century. It's something well over half that

00:53:13 now, maybe $60 million plus last year and growing this year. We estimated what it would cost to

00:53:19 build 100 million of the kind of personal computers that sold last year for the CPUs, the

00:53:26 memory products, the rest of the semiconductor products that go in there, and discovered it

00:53:32 would take some 40 of these wafer fab facilities of the kind we were talking about. These are wafer

00:53:38 fab facilities that we said cost about a billion and a half apiece. It requires about a $60 billion

00:53:45 capital investment in order to make just the semiconductor devices for 100 million PCs.

00:53:54 Who is going to invest this $60 billion? Well, a lot of people will. Another way of looking at it

00:54:03 though is to look at something called Rock's Law. Arthur Rock being one of Intel's directors from

00:54:08 the very beginning, he pointed out that the cost of processing a single wafer is growing exponentially

00:54:17 with time as well. But who's going to make all these investments? Well, if we add up what people

00:54:25 have spent over the last few years and what they are projected to spend for the next few, we see

00:54:31 that the industry is willing to step up to this kind of investment. This is now a worldwide industry

00:54:37 where the contributions from North America, Asia, excluding Japan, and Japan are all major contributors

00:54:49 to the capacity. In 1995, the industry invested some $35 billion in capital expansion and with

00:54:59 the announced facilities in place, it looks like we will average in the $40 to $50 billion a year

00:55:04 over the next several years, assuming there's not some major turnaround. This is a huge amount of

00:55:12 money and for a very capital-intensive business, ought to be expected to add probably $1 in revenue

00:55:21 for each incremental dollar spent on capital. That is, if we spend $40 billion on capital this year,

00:55:29 the revenue ought to increment by $40 billion, more or less, to make it a reasonable investment.

00:55:38 So we can look at what's expected to happen in the growth of the worldwide market.

00:55:42 This shows the projections from the official agency that collects this kind of data.

00:55:50 And lo and behold, they are showing increments that are at least of the order of $30 billion

00:55:55 anticipated for the market looking forward. This is a very large rate of growth for an industry of

00:56:04 this size. Last year, we were about a $150 billion industry, growing a very large amount

00:56:15 in that particular year and anticipating that this is going to continue.

00:56:21 So we have the bits and pieces in place. I think the technology says we can continue to make

00:56:26 considerable progress by working the same way we have. We have a few more turns of the screws,

00:56:32 generations of technology, before we run across any real problems. The industry responds by saying

00:56:39 we're willing to make the investment to continue to grow like that. So how concerned should we be?

00:56:45 So how concerned should we be? Well, I'm concerned more on the economic end, frankly,

00:56:52 than I am on the technical end. I think we've looked at the technical limits long enough.

00:56:58 We recognize we'll get to some eventually, but the cost of getting close continues to escalate.

00:57:06 And then I look at the requirements and the continued growth of the industry here

00:57:10 for us to make the progress we've made in the past by keeping our investment the same.

00:57:15 And on the next slide, I have plotted that along with an estimate of the

00:57:22 world's gross domestic product summed together. And just looking at semiconductors now,

00:57:28 not even the finished products that incorporate semiconductors, and extrapolating the growth rate

00:57:33 we've come to depend on, the 15% per year sort of thing, and you see that by about the year 2040,

00:57:40 there is nothing but semiconductors. We're 100% of the world's GDP. Well, clearly that's not a

00:57:47 very likely outcome. And I don't think it's very likely that the GDP will actually grow

00:57:53 significantly as a result of our approaching it. I think the solution to this problem has to be a

00:58:00 slowing in the growth of the semiconductor industry to leave room for some of the other

00:58:05 things we need like food and shelter, clothing. In fact, I don't know what a maximum percentage

00:58:14 would be, but on this basis, by something like the end of the first quarter of the next century,

00:58:23 we would be 10% of the world's GDP, which also seems high. In fact,

00:58:29 by about the end of this century, if we stay on this slope, will be 1%. And that's about as big

00:58:35 as most industries seem to get before their growth slows dramatically. The auto industry got to a few

00:58:42 percent at one time. Of course, we represent a subset of the electronics industry. I think

00:58:50 electronics is such a fundamental capability in the information age that it might grow to

00:58:56 if not a double digit percent, at least a large single digit percent. But I don't think

00:59:01 semiconductors can be more than a quarter or a third of that. So I think just the economy of

00:59:08 the world is going to put some limitations on how fast we can grow. In the meantime,

00:59:14 we can continue to enjoy the benefits of what is a phenomenal technology,

00:59:19 one unprecedented in human history. For example, in your PC, just over the last few years,

00:59:28 you can see performance advantages where it was $225 per million instructions per second in 1991.

00:59:37 It's only $11 in 95. And we can look forward to $7 per MIPS this year. Nothing else

00:59:47 gives you this kind of improvement with time. It's a technology that I think will continue to

00:59:52 be extremely important, if not forever, at least for many decades looking forward.

00:59:59 And I appreciate the opportunity to share some of my excitement about the technology with you today.

01:00:16 Thank you.

01:00:46 Thank you.